1. Field
The present invention generally relates to an integrated circuit and, more particularly, relates to a debugging circuit for checking the correctness of programs and an integrated circuit including the debugging circuit.
2. Description of Related Art
In semiconductor devices in which a central processing unit (CPU), such as a micro controller unit (MCU), is mounted, when programs to be executed by a CPU are to be developed, a debugging system is used. The debugging system supports debugging operations by displaying information regarding CPU operations that execute a program to be developed and by providing functions of performing specific operations on a program to be developed.
FIG. 1 illustrates an example of the configuration of a debugging system. A debugging system 10 includes a semiconductor device 11, such as an MCU, an external debugging device 12, and a host computer 13. The semiconductor device 11 is a device for which debugging is performed, and includes a CPU 21, a debugging circuit 22, a RAM 23, a ROM 24, a peripheral circuit 25, and an internal bus 26. The CPU 21 executes programs stored in the RAM 23 and the ROM 24. The CPU 21 appropriately accesses the RAM 23 as necessary when a program is executed, and uses the RAM 23 as a work area. The CPU 21 is connected to the debugging circuit 22, and supplies various kinds of execution history information to the debugging circuit 22. Furthermore, the debugging circuit 22 controls the operation of the CPU 21 based on a breakpoint and causes the CPU 21 to execute a debugging program in a debugging state after the break, thereby implementing a desired debugging function.
The external debugging device 12 is connected to the debugging circuit 22 via a debugging terminal 28, and functions as an interface between the debugging circuit 22 and the host computer 13. In the host computer 13, debugger software 15 is executed. A user performs debugging operations on programs to be executed by the CPU 21 of the semiconductor device 11 by operating the debugger software 15 using the host computer 13.
In recent years, some debugging circuits have been incorporated into mass-produced products in response to a request of wanting to perform debugging operations after shipment from factory. Japanese Unexamined Patent Application Publication No. 2001-273167 discloses a hardware break circuit used for debugging, which is incorporated inside a processor so that it can be used as a cache memory after debugging is completed.
Furthermore, there has been another demand of wanting to perform tuning of parameters of programs by using the debugger software 15 while the CPU 21 is executing a program. In order to perform such tuning in parallel with program execution by the CPU 21, it is desirable that the RAM 23 inside the semiconductor device 11 can be directly accessed from the debugging circuit 22 controlled by the debugger software 15 without the intervention of the CPU 21. In a configuration in which the debugging circuit 22 can directly access the resources inside the semiconductor device 11 in the above-described manner, there is a possibility that bus right acquiring requests collide between the debugging circuit 22 and the CPU 21. Therefore, it is desired that a bus right acquiring request and approval thereof are controlled so that the bus can be efficiently used.
In Japanese Laid-Open Patent Publication Nos. 8-263428 and 9-305536, an information processing apparatus in which a split transfer method is applied, and a bus arbitration method for use in the information processing apparatus are disclosed with respect to information equipment in which data input/output is performed via a bus.